演講/活動

2018-12-04 10:14:20Patty Chen#Talk—Dissecting Design Choices for Power Efficient Continuous-time Delta Sigma Analog-to-Digital Co

#Talk—Dissecting Design Choices for Power Efficient Continuous-time Delta Sigma Analog-to-Digital Converters

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#Time—December 7, 2018 Friday 10:00—11:00AM
#Venue—AaPaTo Space(R417),4F Engineering Building 4, NCTU 交通大學工程四館四樓AaPaTo Space (417室)

#Speaker—Prof. Shanthi Pavan
Electrical Engineering, Indian Institute of Technology, Madras
#Host—Prof. Jieh-Tsorng Wu 吳介琮 / Institute of Electronics, NCTU
#Language—English

#Abstract
Continuous-time Delta-Sigma Modulators (CTDSMs ) are a compelling choice for the design of high resolution analog-to-digital converters. Many delta-sigma architectures have been published (and continue tobe invented). This leaves the designer with a bewildering array of choices, many of which seem to pull in opposite directions. Further, it is often difficult to make a clear comparison of various architectures, as they have been designed for dissimilar specifications, by different design groups, and in different technology nodes. This talk examines various alternatives for the design of power efficient single-loop continuous-time delta sigma converters.

#Event website
https://www.facebook.com/events/783164312038036/