演講/活動
2018-12-13 10:08:47陳秋雲(2018.12.19)#TALK Power management circuits for energy harvesting #Welcome all to come ~~~
#TALK Power management circuits for energy harvesting
#Welcome all to come ~~~
#TIME December 19, 2018 Wednesday 10:10AM—12:00PM
#VENUE AaPaTo Space(R417), 4F Engineering Building 4, NCTU
交通大學工程四館四樓AaPaTo Space (417室)
#SPEAKER Associate Prof. Shouri Chatterjee
Dept. of Electrical Engineering, IIT Delhi
#HOST Prof. Shyh-Jye Jou 周世傑
Inst. of Electronics, NCTU
#LANGUAGE English
#ABSTRACT
In this talk I will present our progress towards development of an energy harvesting wireless sensor node. The talk will be based on two integrated circuit designs.
The first one is a maximum-power-point-tracking DC-DC boost converter that can harvest energy from sub-μW power sources is. For available input-power levels below 1 μW, voltage boosting is achieved by operating all circuits in the sub-threshold region, and by switching the DC-DC converter at tens of Hz, thereby reducing switching losses. The talk will further explore the possibility of energizing the DC-DC inductor for an optimum duration, such that switching and resistive losses are minimized. The sub-μW energy harvesting circuit uses an area of 0.2 mm2 on a standard 180 nm CMOS process,and utilizes an auxiliary voltage source for start-up. The designed and fabricated system is more than 50% efficient when the available power is greater than 2 μW. The circuit can harvest energy whenever the available power is more than 0.3 μW with a 25% efficiency. The complete IC consumes 50 nA for internal operations and the input voltage can be as low as 70 mV.
The second integrated circuit design develops on several disadvantages of the first. An oscillator is trained to mimic the frequency and the duty cycle of the comparator-based control circuitry waveforms of the earlier design. This reduces the power consumption of the control circuitry drastically, and the new IC is able to harvest maximum power, with much higher efficiency, over a much wider range of input power levels (90% at 10uW, 25% at 10nW). Cold start-up circuitry is used to bootstrap the circuit from an input RF power level of as low as -25dBm. A complete wireless sensor node, including an on-chip temperature sensor, an ADC, memory, and an RF transmitter with a wake-up radio is designed into the chip. The circuit is capable of autonomously taking temperature readings every 30 min, and transmitting the data on-demand.
I believe that our work in this area will bring the world closer to the dream of a meaningful pad-less chip.
#Welcome all to come ~~~
#TIME December 19, 2018 Wednesday 10:10AM—12:00PM
#VENUE AaPaTo Space(R417), 4F Engineering Building 4, NCTU
交通大學工程四館四樓AaPaTo Space (417室)
#SPEAKER Associate Prof. Shouri Chatterjee
Dept. of Electrical Engineering, IIT Delhi
#HOST Prof. Shyh-Jye Jou 周世傑
Inst. of Electronics, NCTU
#LANGUAGE English
#ABSTRACT
In this talk I will present our progress towards development of an energy harvesting wireless sensor node. The talk will be based on two integrated circuit designs.
The first one is a maximum-power-point-tracking DC-DC boost converter that can harvest energy from sub-μW power sources is. For available input-power levels below 1 μW, voltage boosting is achieved by operating all circuits in the sub-threshold region, and by switching the DC-DC converter at tens of Hz, thereby reducing switching losses. The talk will further explore the possibility of energizing the DC-DC inductor for an optimum duration, such that switching and resistive losses are minimized. The sub-μW energy harvesting circuit uses an area of 0.2 mm2 on a standard 180 nm CMOS process,and utilizes an auxiliary voltage source for start-up. The designed and fabricated system is more than 50% efficient when the available power is greater than 2 μW. The circuit can harvest energy whenever the available power is more than 0.3 μW with a 25% efficiency. The complete IC consumes 50 nA for internal operations and the input voltage can be as low as 70 mV.
The second integrated circuit design develops on several disadvantages of the first. An oscillator is trained to mimic the frequency and the duty cycle of the comparator-based control circuitry waveforms of the earlier design. This reduces the power consumption of the control circuitry drastically, and the new IC is able to harvest maximum power, with much higher efficiency, over a much wider range of input power levels (90% at 10uW, 25% at 10nW). Cold start-up circuitry is used to bootstrap the circuit from an input RF power level of as low as -25dBm. A complete wireless sensor node, including an on-chip temperature sensor, an ADC, memory, and an RF transmitter with a wake-up radio is designed into the chip. The circuit is capable of autonomously taking temperature readings every 30 min, and transmitting the data on-demand.
I believe that our work in this area will bring the world closer to the dream of a meaningful pad-less chip.
